Design of Software-Defined Down-Conversion and Up-Conversion:An Overview

Yue Zhang ,Li-Ke Huang ,Carsten Maple ,and Qing Xuan

(1.Department of Computer Science and Technology,University of Bedfordshire,UK;

2.Aeroflex International Ltd,Stevenage,UK;

3.Sino-European-Link Ltd,UK)

Abstract:In recent years,much attention has been paid to software-defined radio(SDR)technologies for multimode wireless systems.SDRcan be defined as a radio communication system that uses software to modulate and demodulate radio signals.This article describes concepts,theory,and design principles for SDRdown-conversion and up-conversion.Design issues in SDR down-conversion are discussed,and two different architectures,super-heterodyne and direct-conversion,are proposed.Design issues in SDRup-conversion are also discussed,and trade-offs in the design of filters,mixers,NCO,DAC,and signal processing are highlighted.

Keyw ords:SDRdown-conversion;up-conversion;direct-conversion;super-heterodyne conversion

1 Introduction

S oftware-defined radio(SDR)will play a key role in future radio configurations because of the emergence of new wireless technologies and their integration into fourth generation standards such as LTE-Advanced.SDRis a fundamental part of many radio systems,which include up-conversion of the discrete baseband signal into a high-resolution radio signal at the transmitter and down-conversion of the high-resolution radio signal back into baseband at the receiver[1].Fig.1 shows an SDRreceiver in super-heterodyne architecture—a dual-stage conversion architecture in which a radio frequency(RF)signal is down-converted to intermediate frequency(IF)in the first stage and then converted from IFto baseband in the second stage.The hardware in the RF,IF,and baseband sections are controllable and reconfigurable using software(Fig.1).

In Fig.1,the RFfront-end(analog front-end)is the only analog section and includes mixer,low-noise amplifier(LNA),power amplifier(PA),RF combiner,bandpass filter(anti-aliasing),and antenna.The RF front-end is responsible for transmitting and receiving RFsignals and converting RFsignals to IF.Some advanced RFfront-ends allow a certain degree of control,for example,frequency tuning,through software.

The other parts of the SDR architecture are digital processing components.In the IFsection,sampling and separation of IFcarriers,and up/down frequency conversion to baseband is performed by digital IF processing normally implemented in field programmable gate array(FPGA).

Take the receiving path for example.The IFsignal is digitized by the analog-to-digitalconverter(ADC)and then converted to baseband by digital IFprocessing.Digital IFprocessing includes digital down-conversion(DDC)operations such as digital synthesizing,digitalnumerical control oscillator(NCO),digitalmixing,I/Q demodulation,and multirate decimation filtering.In digital IFprocessing,digital up-conversion(DUC)is performed in the reverse order of DDC.Digital systems such as FPGAs are normally used for IF-to-baseband conversion because they are able to handle tight real-time constraints imposed by high-speed sampling and digital conversion.In the back-end of the SDR architecture,the baseband process mainly performs digital communications functions such as symbol timing recovery,equalization,modulation,and channelcoding.These functions are usually carried out using digital signal processors(DSPs)with slightly relaxed real-time constraints.

SDRarchitecture tends to use general-purpose digital systems.FPGAs and DSPs in SDRallow the transmitted signal to be generated and the received radio signal(at the receiver)to be tuned and detected digitally by software.The conventional method involves an analog signal passing through individual hardware components,each of which perform a specific function.SDRsystems offer greatly extended programmability,reconfigurability,and definability.SDR is intended to be a radio system that is flexible,versatile,and multistandard.

This system is therefore able to accommodate updates of new radio functions.

▲Figure 1.Super-heterodyne receiver architecture.

▲Figure 2.Sample rate conversion module in DDCwith integral rate conversion.

This article highlights several possible implementations of receivers and transmitters.Several architectures for SDRreceiver front-ends are reviewed alongside several architectures for transmitter front-ends.In the conclusion,we summarize this work and identify solutions with greatest potential from our point of view.

2 Software-Defined Radio Receiver Architectures

In this section,we review several front-end architectures for SDR receivers.

2.1 Super-Heterodyne Receiver

Fig.1 shows a super-heterodyne receiver.Super-heterodyne is a well-known receiver architecture in which an RFsignal received from the antenna is translated to baseband using a down-conversion mixer,bandpass filter,and amplifier[2].First,the signal is filtered by a bandpass filter(BPF)to obtain the desired channel signal.After BPF,the signal level is boosted by an LNA.The signal is converted to IFbecause of the down-conversion mixer,local oscillator(LO),second-stage BPF,and variable-gain amplifier.Then,it is sampled by an ADC and digitally processed by the DDC.At the DDC,I/Q components are extracted and demodulated to baseband.Because of the sample rate difference at IFand baseband,multirate filters are required to perform sample-rate conversion.

If the conversion rate is an integer,the sample-rate conversion module in the DDC performs image-removal filtering,anti-aliasing filtering,and down-sampling.This module can be jointly designed by using multistage or single-stage filtering.Such a design provides an equivalent impulse response for performing image-removal filtering and anti-aliasing filtering.The single-stage implementation is shown in Fig.2.

If the conversion rate is a fraction,the DDC module performs image-removal filtering,up-sampling,interpolation/anti-aliasing filtering,and down-sampling[3].The filtering operation cannot be jointly designed in this case.Fig.3 shows the single-stage implementation of each filtering operation.

Currently,super-heterodyne architecture is used for higher-RF frequency designs such as LTEand IEEE 802.11ac.The main issue for super-heterodyne receivers is the high-quality image and adjacent filter design.Fig.4(top)shows the process of converting an RFsignal into an IF signal.The received signal contains the desired signal at fLO+fIF,a second signalclose to the image frequency at fLO-fIF,and interference in an adjacent channel[4].The image signal is removed by an image-reject BPF before conversion.At this stage,adjacent interference and image interference cannot be completely removed because of the limitation of the image-reject BPF.The interference levelis attenuated by the image-reject BPF.Fig.5 shows that the remaining signal and interference at the image frequency falls into the same band as the desired signalwhen down-converted into IF.This down-conversion is performed by the mixer and the first LO.However,the image signal,while strongly attenuated by the image-reject BPF,is still present in the signalband at IF.The channel-select BPFcannot remove this interference.The higher the IFthat is chosen,the better the image that can be rejected by a filter because the separation between the desired signal and image is greater.A considerable drawback of using a high IFis that signals in adjacent channels are not sufficiently attenuated by the image-reject filter and a subsequent IF filter becomes necessary.The lower the IF,the steeper the absolute slope of the filter.As a compromise,two different IFs can be used,which creates a dual-IFtopology.Afurther drawback of the super-heterodyne receiver is itscomplexity,which leads to increased chip size,more complex circuit design,and increased power consumption in the direct-conversion receiver.

Figure 3.▶Sample rate conversionmodule in DDCwith fractionalrateconversion.

◀Figure 4.Spectrum conversion in a super-heterodyne receiver.

2.2 Direct-Conversion Receiver

Another approach for front-end architecture is the direct-conversion receiver as shown in Fig.5.A direct-conversion receiver is a simplified version of a super-heterodyne receiver[5],[6].

The received RFsignal is selected by a BPFand amplified by an LNA.The BPFremoves out-of-band interference and noise.After this,the selected RF signal is directly down-converted to DC by a mixer and converted to digital by ADC.Only low-pass filters are needed in the baseband circuits to perform channel filtering.Compared with a super-heterodyne receiver,a direct-conversion receiver has fewer analog components.The absence of a high-Q filter is a significant advantage of a direct-conversion receiver,as is the completely integrated CMOS implementation of the front-end without the signal quality being impaired.

Therefore,the direct-conversion receiver can make use of the high level of integration for multiband receivers.Issues for the direct-conversion receiver include DC offsets,even-order distortion,carrier leakage,and I/Q imbalance[7],and each component has to be carefully designed and tuned.DC offset is generated by self-mixing a strong signal at the mixer stage.The strong signal is normally from interference or the LO signal.The down-conversion stage involves down-converting directly to zero frequency.A DC offset is amplified in baseband together with the received and down-converted signal.If the offset has higher amplitude than the desired signal,the offset dominates and saturates the following LNA[8].In the even-order distortion,spurious signals are created at low frequencies because of the direct-conversion architecture.Because of RFto IFleakage in the mixer,products of even-order distortion in the LNA and mixer can damage the baseband signal.To resolve this problem,differentialcircuits can be used for LNA and mixer,and the design of these circuits should be optimized for linearity.Leakage of the LO signal from the mixer and LNA creates in-band interference for other receivers.To resolve this problem,balanced mixers and LNAs with high reverse isolation are used in the design.In I/Q imbalance,the LO outputs are not exactly 90 degrees out of phase between the Iand Q branches.This phase shift causes I/Q mismatch in the baseband.However,this distortion is frequency-independent,and digital calibration can remove it.

3 Software-Defined Radio Transmitter Architectures

3.1 Super-Heterodyne Transmitter

A super-heterodyne transmitter uses the reverse procedure of the super-heterodyne receiver shown in Fig.6.The signal is created in the digital domain and then converted into analog using simple digital-to-analog converters(DACs).

The complex input I/Q baseband signal is sampled at a relatively low rate,typically the digital modulation symbol rate.The baseband signal is filtered and converted to a higher sampling rate before being converted into analog.Starting at the interpolation filter,the complex input signals pass through three stages of filtering,each of which changes the sampling rate and performs associated low-pass interpolation filtering[9]-[11].

▲Figure 5.Direct-conversion receiver architecture.

The three filtering stages are shown in Fig.6.First,a compensation finite impulse response filter,CFIRG(z),provides a sampling rate that is increased(in step 2)from 1 to 8.The filter also performs Nyquist pulse shaping for the transmitter.Second,a programmable FIRfilter,PFIRH(z),increases the sampling rate by 2 and compensates for the passband distortion created by the third-stage cascaded integrator comb(CIC)filter.

G(z)and H(z)are implemented with efficient multiplier-accumulator(MAC)blocks.Third,the P-stage CIC interpolation filter increases the sampling rate from 4 to 1448.The design parameters of the CIC allow for the synthesis of a circuit that has fixed sampling-rate increases or one where sampling-rate increases are programmable in real-time.Fourth,the CIC coarse-gain control block is needed to control the power distortion caused by CIC filtering.Finally,the complex data stream from the filtering stages is converted into an analog I/Q signal.In the analog domain(after DACs),the signal is modulated at an IF and is amplified and filtered to eliminate harmonics generated during modulation.The signal is then up-converted into RFby the second LO.This RFsignal is filtered by another BPFto remove the image signal and is boosted by an RFPA[12].

▲Figure 6.Super-heterodyne conversion transmitter architecture.

A super-heterodyne transmitter architecture has two advantages.The I/Q modulator works at IFband,which means the circuit is much easier to design than at RFband.Also,the overall signal level can be controlled at IFband.Therefore,it is much easier to design a high-quality variable-gain amplifier at IFband.However,such an amplifier has the same high complexity as the super-heterodyne receiver.Super-heterodyne transmitter architecture is therefore mostly used for wireless measurement instruments or backhaul wireless communication.

3.2 Direct-Conversion Transmitter

A direct-conversion transmitter has a simplified version of the super-heterodyne transmitter architecture[13](Fig.7).The design of the digitaldomain has exactly the same architecture as the super-heterodyne transmitter.The two DACs convert the digital signalinto analog.The following LPFremoves the Nyquist images and improves the noise floor.Then,the complex analog I/Q signals are directly modulated at RFband by the high-specification RFI/Q modulator[14].ABPFcentered at the desired output frequency then removes the image signals.A final PA can boost the desired signalto a certain power level.

The most significant advantages of the direct-conversion transmitter are its versatility,flexibility,spectral efficiency,and low complexity.These make the transmitter simpler than the super-heterodyne transmitter.Small chip and circuit size and low power consumption can be achieved with a direct-conversion transmitter architecture.

Direct-conversion transmitter architecture is mostly used in multimode communication systems.By duplicating the hardware for each channeland each standard,a multimode radio DUC can be implemented.

Although direct-conversion architecture reduces the complexity of the transmitter design,it has some serious drawbacks,including carrier leakage and phase gain mismatch.Gain may need to be controlled at RF.The architecture also requires a PAwith good linearity[15].

4 Conclusion

▲Figure 7.Direct-conversion transmitter architecture.

In this article,we have reviewed receivers and transmitters used in SDR front-ends.Advantages and disadvantages of each design have also been analyzed.A well-designed architecture for multiband multimode receivers and transmitters should allow hardware resources to be optimally shared.The architecture should make use of software-controlled components and software-programmable devices.A direct-conversion approach was used in the transmitter and receiver front-end for implementation in most commercial wireless systems.Direct-conversion is the most appropriate architecture because it is low cost,consumes little power,and has a high-data-rate radio interface.However,system designers need to pay more attention to I/Q imbalance,carrier leakage,and DC offset in a direct-conversion receiver and transmitter system.